Isolation regions are commonly used in the semiconductor industry to prevent parasitic channels between adjacent devices. Two well-known processes of generating isolation regions are recessed local oxidation isolation ("RLOCOS") and shallow trench isolation ("STI"). However, both RLOCOS and STI processes have disadvantages that limit their respective utility, particularly where device geometry is in the sub-micron range.
A process for forming RLOCOS regions is described by S. Wolf in Silicon Processing for the VLSI Era, Vol. 2, pp. 28-31 (Lattice Press, 1990). Therefore, RLOCOS processing will only be briefly described. A silicon substrate, with a conventional oxide/nitride stack, is etched to form grooves in the silicon. Field oxide is then thermally grown in the etched grooves through oxidation. The field oxide grows both downward and upward, until the etched groove is completely filled with the field oxide. Once the field oxide is grown, the oxide/nitride stack is stripped and a gate oxide layer is thermally grown on the surface of the substrate.
Although RLOCOS is widely used, it has several disadvantages. For example, the scalability of RLOCOS technology in the submicron range is limited. Scalability is limited because a large amount of lateral oxide diffuses under the nitride layer during the field oxide growth, thus creating a structure known as bird's beak. A large bird's beak is undesirable because oxide encroachment into the active area reduces the packing density of devices on the substrate. Another limitation of the scalability of RLOCOS technology is the oxide field-thinning effect, which causes the field oxide thickness in sub-micron isolation regions to be significantly less than the thickness of field oxides grown in wider regions.
Moreover, the growth of the field oxide generates stresses at the bottom corners and the sidewalls of the etched grooves, as well as under the nitride layer because of the bird's beak. These stresses, along with the lack of planarity, can generate stacking fault formation and junction leakage at the bird's beak edge. Further, RLOCOS technology produces a bulge, known as a bird's head, in the field oxide near the nitride layer and, therefore, the RLOCOS isolation regions are not planar.
A shallow trench isolation process is also described by S. Wolf in Silicon Processing for the VLSI Era, Vol. 2, pp. 45-48 (Lattice Press, 1990). Accordingly, STI processing will be described briefly. A silicon substrate with a conventional oxide/nitride stack is etched to form a shallow trench, typically 3,500 .ANG. deep. A high temperature oxide growth forms a thin oxide liner, approximately 200 .ANG. thick. The shallow trench is then filled with an oxide layer through high temperature chemical vapor deposited (CVD). A second oxide layer is then deposited over the surface of substrate. The oxide layers are then etched back in order to planarize the surface. The oxide/nitride stack is then stripped, followed by a thermal growth of a gate oxide layer.
Standard STI technology has several disadvantages. The process itself is complex. For instance, the CVD oxide deposition into the trenches can create voids, particularly where the trenches are narrow. Thus, complex methods are used to prevent voids. Additionally, during the etch back step the field oxide is typically over etched causing "dishing", i.e., the field oxide surface becomes lower than the active area surface. Dishing creates problems because portions of the sidewall of the active areas are exposed, which leads to sidewall and edge-parasitic conduction. To prevent dishing, a reverse active area mask is used to protect the field isolation regions during the etch back step.
Another difficulty occurs at the trench edge, where the gate oxide becomes thin. Thinning of the gate oxide layer degrades the gate oxide reliability as well as increases edge-parasitic effects. The thin oxide layer that is deposited prior to deposition of the field oxide is intended to prevent these problems. The thin oxide layer typically results in a seam between the thin oxide layer and the deposited field oxide.